In a power MOSFET (Metal Oxide Semiconductor Field Effect Transistor) with an upper and lower electrode structure, in order to maintain an element breakdown voltage at the time of switching off, impurity concentration and film thickness of a drift layer are adjusted to be within a predetermined range, respectively. The impurity concentration and film thickness of the drift layer are restricted by a limitation of physical-properties of a semiconductor material forming the drift layer. For this reason, a trade-off relation arises between the element breakdown voltage and on-resistance.
There is an MOSFET with a field plate electrode that is electrically connected to a source electrode or the gate electrode. The field plate electrode is located under a trench-type gate electrode. Since the field plate electrode is provided under the gate electrode, space charges derived from impurities in the drift layer are canceled, allowing electric fields generated in the drift layer to approach a constant value. Thus, the impurity concentration of the drift layer can be increased without decreasing the element breakdown voltage, enabling to reduce the on-resistance of the MOSFET provided with the field plate electrode.
On the other hand, in the MOSFET provided with the field plate electrode there is a possibility that density of channels increases and resistance of the drift layer decreases by making cell pitches fine and increasing the impurity concentration of the drift layer. According to this method, the on-resistance may be reduced further.
However, even if the cell pitch is made fine, if the impurity concentration of the drift layer becomes equal to or greater than a predetermined value, influence of impurity scattering of carriers will be large. For this reason, the method mentioned above has a limitation with regard to reduction of on-resistance.